How parity bits are counted in VRC error detection method technique in case of odd parity generator?

How parity bits are counted in VRC error detection method technique in case of odd parity generator?

For example:

We want to TX the binary data unit 1100001

Adding together the number of 1’s gives us 3, an odd number

Before TX, we pass the data unit through a parity generator, which counts the 1’s and appends the parity bit (1) to the end

The total number of 1’s is now 4, an even number

The system now transfers the entire expanded across the network link

When it reaches its destination, the RX puts all 8 bits through an even parity checking function

If the RX sees 11100001, it counts four ones, an even number and the data unit passes

 When the parity checker counts the 1’s, it gets 5 an odd number

The receiver knows that an error has occurred somewhere and therefore rejects the whole unit

Some systems may also use ODD parity checking

The principal is the same as even parity